HomeThe Bluewater BlogCortex-M3 Explained

Surely most engineers are familiar with the basics of the ARM7TDMI? To recap, it has a 32-bit register set with 16 registers, RISC load/store architecture, various processor modes with a role in exception processing, private registers in each mode (particular FIQ with a very useful r8-r14), a simple 32-bit instruction set with only 21 types and an additional 16-bit instruction set with zero-penalty decode logic. Since it was originally released in 1994, several of ARM's engineers wanted to improve on perfection. Perhaps the power consumption could be made even lower, perhaps the instruction set could be made even more dense, perhaps more microcontroller features should become part of the standard design? The shrinking area of silicon required for a microcontroller, and the resulting reduction in cost, presented another opportunity. It should be possible to make an ARM chip as small as an 8-bit micro, and to consume less power. Cortex-M3 is the result of these factors. It is not radically different from ARM7TDMI, and retains most of the architectural features. But it drops several, expands others, and adds a few more. Key features of Cortex-M3 are:

  • You program it entirely in C. There is no longer any need for assembler, although it is still available. This doesn't mean that it is less efficient
  • It won't run Linux. It is aimed at small microcontrollers so does not include data aborts for virtual memory, etc.
  • Built-in microcontroller functions, such as interrupt controller, timers, memory protection
  • Drops exception modes and the ARM instruction set (only supports Thumb / Thumb 2)
Some lesser features are:
  • Thumb-2 instruction, a clever extension which gives the code size benefits of Thumb with the performance benefits of 32-bit ARM code
  • Single Wire Debug (SWD) option, which reduces the number of pins required for JTAG/debug functions from 5 to 2
  • Integrated trace functionality, traditionally only available on higher end ARM9 devices. Cunningly, it also operates over the SWD port
  • Half the interrupt latency (or better), by building the concept of state saving directly into the micro. In particular, consecutive interrupts can be processed without the traditional save/restore step in between
  • Half the power consumption when running, plus an integrated sleep mode
  • 30% faster operation at the same clock speed
  • ARMv7-M Harvard architecture with a number of new instructions
ARM's removal of the exception processing part of ARM7TDMI was not just a clever way of getting rid of stuff that low-end microcontroller engineers don't need. It also provides a clear differentiation between the higher end micros and the new microcontroller range. This make it possible, at least in theory, for companies like Atmel to sell an ARM9 range at $6, and ARM7 range at $3-4 and a Cortex-M3 range at $1. In my view this is one of the cleverest features of Cortex-M3 - it doesn't canabalise the existing market to the extent that you might think. Bluewater Systems has completed a number of Cortex-M3 designs and we have built quite complex embedded software systems using it. When combined with the RealView tool chain, it is a formidable player in the embedded market. For the price, it is surely unbeatable. Cortex-M3 micros were first shipped by Luminary Micro who have 134 models to choose from. ST Microelectronics have a respectable 38 so far. Atmel is on board now also although I can't see any devices yet. For more details on Cortex-M3, and if you have an hour spare, take a read of the original white paper on the topic from ARM's web site. You might find this useful too.